Design of 2w4wsk-point Fft Processor Based on Cordic Algorithm in Ofdm Receiver

In this paper, the architecture and the implementation of a 2K/4K/SK-point complex fast Fourier transform (FFT) processor for OFDM system are presented. The processor can perform 8K-point FFT every 273p , and 2K-point every 68.26~s at 30MHz which is enough for OFDM symbol rate. The architecture is based on the Cooley-Tukey algorithm for decomposing the long DFT into short length multi-dimensional DFTs. The transposition and shuffle memories are used for the implementation of multi-dimensional transform. The CORDIC processor is employed for the twiddle factor multiplications in each dimension. A new twiddle factor generation method is also proposed for saving the size of ROM required for storing the twiddle factors.